From fb22e22eb1389e8473a61fb0bf1079c4a325eb8c Mon Sep 17 00:00:00 2001 From: Keir Fraser Date: Thu, 22 Nov 2007 15:10:47 +0000 Subject: [PATCH] [SVM] handle MC threshold registers for Barcelona Signed-off-by: Christoph Egger --- xen/arch/x86/hvm/svm/svm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 96e380a9d6..5dc570dee8 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -133,6 +133,7 @@ static enum handler_return long_mode_do_msr_write(struct cpu_user_regs *regs) break; case MSR_IA32_MC4_MISC: /* Threshold register */ + case MSR_F10_MC4_MISC1 ... MSR_F10_MC4_MISC3: /* * MCA/MCE: Threshold register is reported to be locked, so we ignore * all write accesses. This behaviour matches real HW, so guests should @@ -1777,6 +1778,7 @@ static void svm_do_msr_access( break; case MSR_IA32_MC4_MISC: /* Threshold register */ + case MSR_F10_MC4_MISC1 ... MSR_F10_MC4_MISC3: /* * MCA/MCE: We report that the threshold register is unavailable * for OS use (locked by the BIOS). -- 2.30.2